PCB Fabrication

Timing calculation of SpecctraQuest simulation

by:A-TECH      2021-03-30
Usually when we calculate timing problems, we generally focus on following two conditions to ensure sufficient TimingMargin: 1. Tflightmax+Driver(Tcomax)+Skew+Jitter+Crosstalk+Receiver(Setup)0 The Tco of the Driver can generally be found from the datasheet of the device. Tco actually includes the internal logic delay of the device and the I/O buffer delay (Bufferdelay), which is generally measured by adding a test load (usually 50ohm), that is, the clock signal starts from the driver to the measurement point and the signal rises to the measurement level ( Vms) delay. [Tco found on the device datasheet is this value] We usually want to use simulation tools to get the maximum/minimum Flighttime. In CadenceSpecctraQuest: Tflightmax is generally called Finalsettledelay and Tflightmin is also called Firstswitchdelay, which refers to the output waveform of the device through the buffer The time from the beginning of Vms to the maximum/minimum threshold voltage at the receiving end. Although Cadence is also defined in this way, in actual simulation, if the default simulation parameter Bufferdelay selects Fromlibrary, the usually calculated Finalsettledelay/Firstswitchdelay is the time from time zero to the maximum/minimum threshold voltage at the receiving end, which means that The buffer delay (which is a part of Tco) has been included, so that if we use the above-mentioned formula 1,2 to calculate the time, the Bufferdelay in Tco will be double-calculated. The solution is to modify the simulated Tflightmax and Tflightmin and subtract a Bufferdelay. There are two possibilities: 1. If the test load of IBIS is the same as the test load of Tco indicated in the device manual, we can directly use the Cadence tool To calculate it, just set Bufferdelay to On-the-Fly mode, then the simulation result will automatically calculate the true maximum/minimum FlightTime after subtracting Bufferdelay, or you can directly watch the rising waveform of the device in its model editor. By measuring the time it takes to rise to Vms, the time of BufferDelay can be roughly determined. After experimentation, it is found that the calculated deviation between the two is about 0.01ns. 2. If the IBIS test load is different from the Tco test load indicated in the device manual, you can use the Cadence model editor to modify the IBIS terminal load to be consistent with the measured Tco, and then obtain the Tco from the simulated waveform The measurement in Bufferdelay. A few questions: 1. In addition to calculating bufferdelay, what is the difference between choosing On-the-fly mode and choosing FromLibrary in other aspects? It seems that it has no effect on the simulation results (except for the On-the-fly in the Help document, the Driver can only add Pulse excitation). 2. If Vms is not provided in the IBIS model, how will Cadence be calculated? What is its default value? 3. Is the above understanding of timing and Cadence tools wrong?
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