PCB Fabrication

Basic SDRAM circuit design

by:A-TECH      2021-03-25
There are many essentials for SDRAM circuit design. Only some basic knowledge will be explained here. We should note that the SDRAM circuit should be designed well in accordance with the common end clock synchronization system timing. The 22/33 ohm series resistor is entirely for the purpose of connecting to the source end. The impedance is matched and placed close to the source end can effectively match the impedance of the transmission line, so that the signal output power is maximized and the signal to noise ratio is high. In this way, the resistance can also attenuate the echo and reduce ringing. But this also caused the shortcomings of the resistance (cooperating with the distributed capacitance) to slow down the signal edge and reduce the speed.   Both the address line and the control line are unidirectional, so it is easy to determine the source and remote end, as long as the resistor is placed at the source end. No, the data line is bidirectional. It is impossible to determine which end is the source and which end is the purpose. How to place it? Don't put it at all. For one thing, putting the resistor at the far end will not have a matching effect at all, and secondly, the wiring will add trouble. There is a saying that 'who has less time on the rising edge should be close to whom'. This method is beneficial to eliminate echo and slow down the edge (reduce the harmonics). It is a remedy. I don't know if it is?   There are many harmonics on the steep edge. This kind of signal is “dirty” and easily pollutes the electromagnetic environment inside the board, so it needs to be actively avoided. The sine wave is the purest signal and can be used frequently.  Note: The clock line and the important signal line must use matching resistors separately, and the address line can use exclusion to reduce the board area.   The main point of SDRAM circuit design is to obtain/set valid data correctly (clock edge falls on the valid data bit, the reference voltage is stable, and the level judgment is correct). SDRAM can be adjusted to reduce cross-wiring. Only in this way can we do better.
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